FPGA based program for Break Junction measurements

At first, I developed a similar program, with the same DAQ device (NI-6363), for con-trolling break junction measurements. Through utilizing the available hardware triggers, it is possible to precisely control the electrode displacement and stop the movement of the piezo, when a preset conductance value is reached. This enabled us to study contact memory effects, which require measurements, where the junction is always closed until the same conductance value. However, this DAQ device had several constraints: the res-olution of the analog inputs is 16 bit, therefore the logarithmic current-voltage converter

1In an ASCII file, each character is stored on 8 bit. This includes each digit, the decimal separator, and the character that separates the different values in the file. This way, 72 bits are required per value with 7 digits precision. In contrast, a floating-point number stored on 32 bit provides 7-8 digit precision

is necessary for measuring the junction conductance over a wide range, which includes the conductance of molecular and also metallic contacts. Another substantial limitation is that once a trigger event is generated and the elongation is stopped, it takes a certain time (≈ 0.5 sec) until the computer reconfigures the DAQ device for the next opening cycle. We found, that a metallic junction with relatively large conductance (>10 G₀), is stable enough, that the conductance does not change much during this time, even when measured at room temperature. However, this delay became an obstacle later, when we decided to investigate molecular junctions by stopping the elongation when a molecule attaches between the electrodes and perform a series of current-voltage or noise measure-ments on the molecular junction. In this case, during the 0.5 seconds delay, the molecular junction can change significantly or even break away. While the computer is reconfiguring the DAQ device, the current measurement is also stopped, which means, that we are not able to monitor what is happening to the junction during this time.

In the literature, there are examples of similar current-voltage and noise measurements performed on molecular junctions, two different approaches are used for controlling the electrode displacement. The first one is to elongate the junction very slowly [65]. In this case, there is no need for hardware triggers since the measurement program is fast enough to stop the elongation when the set conductance level is reached with only minor over-shoots. Due to the long measurement times, fewer traces can be recorded this way, which leads to less reliable statistics. The other solution is to simply pause the elongation at a fixed displacement position [66–68]. In this case, there is no control over the conductance of the junction during the period, when the junction is held steady. However, when a large number of traces are recorded this way, there will be a portion where the elongation was paused at the correct position, with a molecule bridging the gap between the electrodes.

These traces are then selected for the analysis, while the others are filtered out.

We wanted to perform break junction measurements in a controlled way, with the ability to stop the elongation when a specified conductance is reached and vary the bias voltage according to a predefined signal. At the same time, we did not want to significantly reduce the elongation speed. To achieve this, the control loop needs to be implemented at the hardware level. Such a control system becomes especially important when perform-ing measurements at low temperature [2]. Under such conditions, the number of traces showing molecular signatures is reduced, hence more traces are required to gather a suf-ficient amount, where a molecule was present. Without this level of control, even more traces would have to be recorded to obtain a portion, where both a molecule was attached between the electrodes and also the elongation was paused at the molecular plateau.

For this reason, I developed a new measurement control program, which uses a ”com-pact Reconfigurable IO” (cRIO) system as the DAQ hardware. Such a system can be used to implement the control loop on the hardware instead of the software, that runs on the PC.

The cRIO system has a controller module, a computer that runs a real-time operating system. A real-time operating system is designed to execute a single program at a specified rate, without interruption. On such a system, a certain operation takes the same time, every time it executes which enables the synchronization of parallel loops as well as precise timing, typically with≈1µsec accuracy. In contrast, a general-purpose operating system runs many programs concurrently, which means, that the execution of a certain program can be delayed at any time by the operating system. This leads to inaccurate timing,

depending on the demand from concurrent programs.

The cRIO controller is connected to a chassis which includes an FPGA², a pro-grammable chip containing inputs, outputs, logic blocks and propro-grammable interconnects (Figure 3.7/A). Instead of a series of commands executed by a CPU, a program for an FPGA defines the connections between these inputs, outputs, and logic gates. Pro-gramming of the FPGA in the cRIO system is similar to writing an ordinary LabVIEW program, with minor changes in the available operations. Once the program is loaded to the FPGA, it acts as a hardware: there is no operating system that schedules the execution of programs, no CPU, hence every independent operation runs in parallel.

Figure 3.7: (A) An FPGA is composed of configurable logic and I/O blocks tied together with programmable interconnects [69]. (B) Configuration of the cRIO system, used with the measurement control program.

In our cRIO system (Figure 3.7/B), there are four slots, where different input and output modules are connected. An analog input module with 16 bit resolution and 1 MHz sampling frequency, these inputs are used with the logarithmic current-voltage converter for fast measurements. A second analog input module with 24 bit resolution and 50 kHz sampling frequency, which is used with the linear amplifier. An analog output module, that controls the bias voltage and the voltage on the piezo positioners. A digital I/O module for controlling the step motor that is used for the coarse positioning.

In such a system, the measurement control program consists of three parts: the pro-gram for the FPGA, the propro-gram running on the cRIO controller and a propro-gram that runs on the PC and interacts with the user. These parts of the program communicate with each other to send and receive instructions and data.

Figure 3.8 shows the most important processes running on these three devices and the way they communicate. The FPGA measures the inputs and generates the signals driving the step motor, moving the piezo, and controlling the bias voltage. Each of these functions is implemented by a separate ”Task”, that is controlled through a set of commands and parameters that describe the details of each command. For example, the Bias Task

2The abbreviation stands for Field-Programmable Gate Array.

controls the voltage on the junction. To change this output, a ”Set Bias” command is sent along with two parameters: the new value for the bias voltage and the speed of the voltage change. Then the Bias Task ramps the output voltage with the specified speed until it reaches the specified level. Additionally, there is a Trigger Task, that compares the measured voltage on a selected input with a specified threshold. Depending on the trigger condition, it signals to the other tasks when the voltage goes above/below the set threshold. Let us consider another example, where the junction is elongated with the piezo and stopped automatically when the measured conductance goes below a threshold.

This can be achieved by setting up the Z Piezo Task to elongate the junction with a specified speed until a trigger signal is received, and also the Trigger Task to signal when the current-voltage converter’s output drops below the value, which corresponds to the specified conductance threshold. These tasks are running in parallel, synchronized to the same 100 kHz clock signal. As a result, when a voltage value is measured that is below the trigger level, the Z Piezo Task receives the trigger signal and stops the elongation immediately. The commands along with the corresponding parameters for the tasks are set up either by the program running on the cRIO controller or the ”Scheduler” process on the FPGA, which can be used to schedule a series of commands for each task. In the latter case, once the tasks complete the execution of the specified commands, the Scheduler process automatically loads the next command for each task.

Figure 3.8: The measurement control system has three parts: FPGA, cRIO controller (with real-time OS) and PC. Illustration of the most important processes running on these three devices and the way they communicate.

The cRIO controller is connected to the local network and uses TCP protocol to communicate with the program running on the PC. The main process that runs on the controller is called ”RT Controller”. This receives commands from the PC and sets up the tasks on the FPGA accordingly. The ”Data Handler” process on the FPGA sends the voltages measured on the inputs along with the output voltages over a FIFO memory to the ”Timed Loop” process on the cRIO controller. This is a time-critical process that runs with high priority to prevent the overfill of the memory and ensure, that all data points are received. Resources on the FPGA are limited, therefore the cRIO controller is also used to perform calculations that are not time-critical. From the ”Timed Loop”

process, data is sent to the ”Data Handler” process, which preprocesses the measured data. Then it selects those input and output channels that are requested by the program running on the PC and sends these to the ”SPM controller” process. This process applies the calibration to the measured data, calculates the conductance, and sends the calibrated data to the other processes/windows that require it.

To perform a break junction measurement, a series of commands are scheduled for the FPGA tasks. As an example, let us consider the measurement of opening/closing conductance traces, with a current-voltage measurement during the opening part that is performed at a specified conductance level. Such a measurement scheme contains 4 commands executing in a loop displayed on Figure 3.9/A. The signal during the current-voltage measurement can be defined using the ”Waveform Editor” window. After the signal is set up, the data is sent to the cRIO controller and stored in its memory. The schedule of the tasks can be set up using the ”Scheduler Window” (Figure 3.9/B), on the

”Basic” tab, a typical beak junction measurement can be configured. The parameters for the opening and closing directions can be set up independently. The excursion, that is the amount the piezo moves, is either a fixed displacement or moved until a specified conductance limit is reached. In either direction, optionally, the elongation can be paused at a specified conductance level to record the junction conductance while the signal from the cRIO controller’s memory is generated on the bias voltage output. On the ”Advanced”

tab, the schedule can be edited manually by defining commands for each FPGA Task separately. Using this page, it is also possible to define commands, that only execute during the first cycle or every nth cycle of the scheduled commands. This way, a wide range of measurement schemes can be realized.

Figure 3.9: (A) Scheduled tasks for the measurement of opening/closing conductance traces, with a current-voltage measurement during the opening part, performed at a speci-fied conductance level. (B) Screenshot of the user interface when setting up this measure-ment scheme.

The program on the PC analyzes the data and visualize it on the user interface. The main window is called SPM Controller, this launches all of the processes and also the windows, where the user can interact with the program.

Figure 3.10 shows a screenshot of the ”BreakJunction” and the ”Mover” windows

during a measurement. The Mover window can be used to send commands to the FPGA, to move with the piezo positioner or with the step motor. This can be done either by setting the position directly or using the trigger to move until a set conductance value is reached. This window also displays the current position of the piezo.

Figure 3.10: Screenshot of the user interface during break junction measurement.

The ”BreakJunction” window has two pages, on the ”BreakJunction” page, the data is displayed during the automated measurements. Along with the measured data, the FPGA also sends metadata that describes for each point, whether it was recorded during the opening, the closing, or the hold period. Based on this information, the data is displayed on the corresponding graph. This window also performs basic analysis and displays the one-dimensional conductance histogram of the measured traces. The conductance data is automatically saved using a binary format. Optionally, a filter can be used to check different criteria before saving a measured trace. This filter can verify, if the junction was ruptured completely or if it was maintained during the hold period. The ”Scope”

tab can be used for ”manual” measurements. In this case, the user controls the electrode displacement manually, using the ”Mover” window, and the ”BreakJunction” window is used for controlling the bias voltage and to save the measured signals. There are two graphs, which can be used to display any of the following signals during the measurement:

Current, Bias Voltage, Conductance, Resistance, Piezo position.

As an example, I describe one of the earlies current-voltage measurements, we con-ducted using the FPGA based measurement program, to perform current-voltage mea-surements on 4,4’ bipyridine molecule at 4.2 K, using a low temperature MCBJ setup.

We set up the measurement program, to stop the elongation of the junction when the measured conductance reaches 10⁻⁴ G₀, which corresponds to the conductance of the molecular junction. Then the bias voltage was varied linearly between −0.5 and 0.5 V. 5 bias cycles were measured, the length of the I(V) measurement took 2 seconds in total for each trace. Finally, the junction is further elongated and ruptured. This last segment of

the opening trace can be used to identify, whether a molecule was present during the I(V) measurement, in which case, a clear drop is observed upon the rupture of the molecular contact. We automatically recorded 3000 such traces. During this type of measurement, at low temperature, the use of a hardware trigger is essential, since due to the low pick-up rate, only a small portion of the traces exhibit molecular signatures. Without the ability to stop the elongation at a predefined conductance value, the number of usable traces would be even lower, as the hold period might not coincide with the molecular plateau.

Figure 3.11: Current-voltage measurement on BP junction. (A) opening conductance trace, vertical dashed line indicates the position, where the elongation was stopped to per-form the I(V) measurement. Applied bias voltage (B), measured current (C) and junction conductance (D) versus time. (E) Current versus applied voltage during the 3rd voltage cycle. Above a threshold voltage, rapid switching is observed between two conductance states.

Here, I discuss the results of a single I(V) measurement on a molecular junction. Figure 3.11/A shows the recorded conductance trace, dashed vertical line indicates the position where the elongation was stopped to perform the I(V) measurement. The bias voltage, the measured current, and the junction conductance are displayed on Figure 3.11/B-D.

When the applied voltage is increased above a threshold value, rapid switching between two conductance states is observed. Furthermore, the switching time, that is the time between two switching events, seems to depend on the applied voltage: the larger the applied voltage, the shorter the time that the junction spends in one conductance state.

This is best shown by the current-voltage plot displayed on Figure 3.11/E, which shows the 3rd voltage cycle of the I(V) measurement. During this cycle, the junction starts from the high conductance state, at ≈ 4·10⁻⁴ G₀. After the first half of the bias cycle, the molecule is switched to the low conductance state at≈8·10⁻⁵ G₀, then at the end of the cycle it switches back to the high conductance state again.

We observed similar switching behavior in many traces showing molecular signatures.

Gr´eta Mezei analyzed these in more detail and performed many more measurements, to determine the distribution of the conductance values, that the junction is switching between and to identify the relationship between the applied bias voltage and the switching times [2]. Possible applications of such a two-level system include a voltage-controlled molecular switch and the realization of a p-bit.

A probabilistic bit or p-bit stands in between a traditional bit, that stores either 0 or 1 and a quantum bit, which can be prepared in a superposition of the two possible states [70]. A p-bit consists of a classical two-level fluctuator, with the ability to tune the time, that it spends in each state. A network of these p-bits can be utilized to solve certain problems more efficiently compared to traditional computer algorithms, one such example is integer factorization [71]. For the realization of a single-molecule p-bit, one needs to determine how the switching times can be tuned through the control of the electrode separation and/or the applied bias voltage.